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ZUG3023 – Digital Systems

Undergraduate – Module

Refer to the specific census and withdrawal dates for the semester(s) in which this module is offered.


Business, Engineering and Technology


South Africa
On-campus block of classes

  • Semester 1, 2020 (Mainstream Programme)
  • Semester 1, 2021 (Extended Programme)

12 credits, NQF Level 7


The overall aim of this module is to provide the understanding and core knowledge in digital system design, with a focus on Field Programmable Gate Array (FPGA) based reconfigurable computer system applications.


On completion of the module, students will be expected to be able to:

1Critically discuss and compare the architectures of various programmable logic devices, support technology and in system programming.
2Illustrate and outline the design methodology for programmable logic devices.
3Understand the application, layout and configuration and interfacing of FPGAs.
4Design and compile a new schematic in Quartus II.
5Demonstrate understanding through basic VHDL design, implementing programming paradigm, implementing architectures, operators, sequential circuits and data objects.
6Outline the implementation of SOPC systems and the general development flow involved with the design process, illustrate the architecture and memory of the Nios processor, perform hardware and software development to implement low-level I/O, controller and memory.
7Explain what asynchronous state machines are, design and implement FSM applications.
8Implement a system that demonstrates the use of VHDL designs, a Nios II system, user input, output and the implementation of one of the Altera IP cores.


Coursework assessment: 60%
Project: 40%

Workload requirements

Digital and microprocessor based systems are increasingly popular in the electronics industry, they are found in a myriad of different products, from DVD players and cell phones to satellite communication devices.  The use of an FPGA based development demonstrates the fundamentals of System-on-a-Chip (SoC), where all the components of a basic digital and/or microprocessor based systems can be integrated into a single FPGA device. To reinforce learning the following design and synthesis tools are recommended:

  • FPGA based development board which will facilitate the teaching of the basics of System-on-a-Chip (SoC) where all the components of a basic microprocessor based system can be integrated into a single FPGA device.
  • Altera’s Nios II is a soft processor, defined in a hardware description language, which can be implemented in Altera’s FPGA devices by using the Quartus CAD system.

There will be a combination of lectures that include interactive elements, tutorials in which students will do individual work, and assignments in which the students will work in a group. All outcomes will be assessed by means of class tests and a project.

Chief examiner(s)





Digital Electronics, Basic Analogue Electronics